Memory manufacturer SK Hynix is rethinking enterprise solid-state drive architecture by planning to distribute more than 100 specialized processors across individual SSD controllers. Unveiled during the recent International SoC Design Conference by vice president Koo In-je, the new Hynix Transaction Processing Unit (H-TPU) approach aims to bypass the physical and thermal limits currently facing general-purpose CPUs inside modern storage hardware.
Traditional SSD controllers rely on standard processor cores to juggle both complex oversight functions and heavy routines like reading data, updating metadata, and managing buffers. As transfer speeds accelerate and artificial intelligence workloads demand faster data pipelines, relying solely on conventional cores forces controllers to grow physically larger while consuming significantly more electricity. SK Hynix addresses this bottleneck by delegating routine input and output transmission tasks to arrays of ultra-compact, dedicated cores.
Each individual H-TPU core consumes roughly 2.5 percent of the power required by a standard CPU core while taking up just 4 percent of its physical chip area. Utilizing a four-stage pipeline designed for sequential execution, the system dynamically activates only the specific units needed for incoming requests, leaving idle units powered down. Meanwhile, main general-purpose cores remain dedicated to high-level operations like error recovery and storage policies.
Looking ahead, SK Hynix intends to embed H-TPU architecture into upcoming enterprise storage products, its Storage Next framework, and upcoming High Bandwidth Flash memory systems slated for next year. With future data transfer standards like PCIe 6.0, 7.0, and 8.0 on the horizon, this distributed mini-core strategy is designed to keep power consumption in check as storage infrastructure evolves to meet the needs of smaller, more frequent AI data requests.
SK Hynix Plans Over 100 Tiny Processors Per SSD to Tackle AI Loads
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